Product Bulletin
Download Acrobat PDF |
 |

AR5002G Solution Highlights
-
Support for IEEE 802.11b, 802.11g
-
Uses digital CMOS technology exclusively,
minimizing power consumption and cost while maximizing reliability
-
Highly integrated 2-chip set
-
2.4 GHz Radio-on-a-Chip (RoC)
-
Multiprotocol MAC/baseband processor
that supports the RoC
- Wireless Multimedia Enhancements Quality
of Service support (QoS)
-
Super G® mode delivers up to 108 Mbps raw data
rate with typical end user throughput exceeding 60 Mbps
-
Hardware encryption for the Wi-Fi Protected
Access (WPA) and IEEE 802.11i security specifications, provides
Advanced Encryption Standard (AES), Temporal Key Integrity Protocol
(TKIP) and Wired Equivalent Privacy (WEP) without performance
degradation
-
Support for draft IEEE 802.11e, h, and i
standards
-
Third-generation
OFDM radio provides best-in-class range, throughput and power
consumption
The chipset includes:
AR2112 Dual band
Radio-on-a-Chip (RoC)
-
Support for IEEE 802.11b, 802.11g
-
Operates from 2.300 - 2.500 GHz
-
Advanced wideband receiver with best path sequencer for better range
and multipath resistance that conventional equalizer-based designs
-
Integrated third-generation power amplifier
(PA) and low-noise amplifier (LNA)
-
External PA and/or LNA can be used for special
applications
-
Eliminates all IF filters and most RF filters;
no external voltage-controlled oscillators (VCOs) or surface
acoustic wave (SAW) filters needed
-
Enhanced transmit and receive chains
AR5212 Multiprotocol MAC/baseband processor
-
Supports both 2.4 GHz and 5 GHz RoCs
-
Super AG® mode includes dynamic 108 Mbps
capability, real-time hardware data compression, dynamic
transmit optimization and standards-compliant bursting
-
No external FLASH or RAM memory needed
-
PCI 2.3 and PC Card 7.1 host interfaces with DMA
support
-
Integrated analog-to-digital and
digital-to-analog converters
-
Serial EEPROM, LEDs, GPIOs peripheral interfaces
-
Low power operational and sleep modes
AR5002G WLAN System Architecture

|
AR5002G Chipset Specifications |
|
Frequency Band |
2.300 to 2.500 GHz |
|
Network Standard |
802.11b, 802.11g |
|
Modulation Technology |
OFDM with BPSK,
QPSK, 16 QAM, 64 QAM; |
|
|
DBPSK, DQPSK, CCK |
|
FEC Coding Rates |
1/2, 1/3, 3/4 |
| |
|
|
Hardware
Encryption |
AES, TKIP, WEP |
| |
|
|
Quality of Service |
802.11e draft |
|
Media Access Technique |
CSMA/CA |
|
Host Interface |
Mini PCI, PC Card, PCI |
|
Communication Interface |
|
|
Peripheral Interface |
GPIOs, LEDs |
|
Memory Interface |
EEPROM |
|
|
|
|
Supported Data Rates |
|
|
IEEE 802.11a, 802.11b, 802.11g Standard Mode |
1-54 Mbps |
|
Atheros Super A Mode |
|
|
Atheros Super G Mode |
1 - 108 Mbps |
|
Atheros Super AG Mode |
|
| |
|
|
Chip Specifications |
AR2112 |
AR5212 |
|
Operating Voltage |
2.5V +/-5% 3.3V +/-10% |
2.5V +10%, -5% 3.3V +/-10% |
| |
|
|
|
Package Dimensions |
9mm x 9mm |
15mm x 15mm |
|
Packaging |
64 Leadless Plastic Chip
Carrier |
196 Plastic Ball Grid
Array |
* Theoretical wireless link rate based on applicable
IEEE 802.11 standards. Actual user throughput will be lower than the
theoretical link rate and will vary, as network conditions and
environmental factors can lower actual throughput rate. |